Commission Delegated Regulation (EU) 2023/66 of 21 October 2022 amending Regulation (EU) 2021/821 of the European Parliament and of the Council as regards the list of dual-use items

Type Delegated Regulation
Publication 2023-01-11
State In force
Text As published
Department European Commission, TRADE
Source EUR-Lex
articles 2

This is the act as published. Later amendments are not folded into the text below: each one is a separate act in this repository and an entry in this law's history.

Reform history JSON API

Technical Note:

A ‘Process Design Kit’ (‘PDK’) is a software tool provided by a semiconductor manufacturer to ensure that the required design practices and rules are taken into account in order to successfully produce a specific integrated circuit design in a specific semiconductor process, in accordance with technological and manufacturing constraints (each semiconductor manufacturing process has its particular ‘PDK’).

3E002

"Technology" according to the General Technology Note, other than that specified in 3E001, for the "development" or "production" of a "microprocessor microcircuit", "microcomputer microcircuit" or microcontroller microcircuit core, having an arithmetic logic unit with an access width of 32 bits or more and any of the following features or characteristics:

Technical Note:

A ‘vector processor unit’ is a processor element with built-in instructions that perform multiple calculations on ‘floating-point’ vectors (one-dimensional arrays of 32-bit or larger numbers) simultaneously, having at least one vector arithmetic logic unit and vector registers of at least 32 elements each.

Technical Notes:

3E003 Other "technology" for the "development" or "production" of the following:

3E004

"Technology" "required" for the slicing, grinding and polishing of 300 mm diameter silicon wafers to achieve a ‘Site Front least sQuares Range’ (‘SFQR’) less than or equal to 20 nm at any site of 26 mm × 8 mm on the front surface of the wafer and an edge exclusion less than or equal to 2 mm.

Technical Note:

For the purposes of 3E004 ‘SFQR’ is the range of maximum deviation and minimum deviation from front reference plane, calculated by least square method with all front surface data including site boundary within a site.

3E101

"Technology" according to the General Technology Note for the "use" of equipment or "software" specified in 3A001.a.1. or 2., 3A101, 3A102 or 3D101.

3E102

"Technology" according to the General Technology Note for the "development" of "software" specified in 3D101.

3E201

"Technology" according to the General Technology Note for the "use" of equipment specified in 3A001.e.2., 3A001.e.3., 3A001.g., 3A201, 3A225 to 3A234.

3E225

"Technology", in the form of codes or keys, to enhance or release the performance of frequency changers or generators to meet the characteristics of 3A225.

PART VI

Category 4

CATEGORY 4 - COMPUTERS

Technical Note:

‘Main storage’ is the primary storage for data or instructions for rapid access by a central processing unit. It consists of the internal storage of a "digital computer" and any hierarchical extension thereto, such as cache storage or non-sequentially accessed extended storage.

4A Systems, Equipment and Components

4A001 Electronic computers and related equipment, having any of the following and "electronic assemblies" and specially designed components therefor:

- 1. Rated for operation at an ambient temperature below 228 K (– 45 °C) or above 358 K (85 °C); or

a. Total Dose 5 × 103 Gy (silicon);
b. Dose Rate Upset 5 × 106 Gy (silicon)/s; or
c. Single Event Upset 1 × 10–8 Error/bit/day;

4A003

"Digital computers", "electronic assemblies", and related equipment therefor, as follows and specially designed components therefor:

- — ‘Vector processors’;

- — Logic processors;

- a. Not used;

- b. "Digital computers" having an "Adjusted Peak Performance" ("APP") exceeding 70 Weighted TeraFLOPS (WT);

- c. "Electronic assemblies" specially designed or modified for enhancing performance by aggregation of processors so that the "APP" of the aggregation exceeds the limit specified in 4A003.b.;

- e. Not used;

4A004 Computers as follows and specially designed related equipment, "electronic assemblies" and components therefor:

Technical Notes:

4A005 Systems, equipment, and components therefor, specially designed or modified for the generation, command and control, or delivery of "intrusion software".

4A101 Analogue computers, "digital computers" or digital differential analysers, other than those specified in 4A001.a.1., which are ruggedized and designed or modified for use in space launch vehicles specified in 9A004 or sounding rockets specified in 9A104.

4A102 Hybrid computers specially designed for modelling, simulation or design integration of space launch vehicles specified in 9A004 or sounding rockets specified in 9A104.

4B Test, Inspection and Production Equipment

None.

4C Materials

None.

4D Software

4D001

"Software" as follows:

4D002 Not used

4D003 Not used

4D004

"Software" specially designed or modified for the generation, command and control, or delivery of "intrusion software".

4E Technology

4E001

TECHNICAL NOTE ON "ADJUSTED PEAK PERFORMANCE" ("APP")

"APP" is an adjusted peak rate at which "digital computers" perform 64-bit or larger floating point additions and multiplications.

"APP" is expressed in Weighted TeraFLOPS (WT), in units of 1012 adjusted floating point operations per second.

Abbreviations used in this Technical Note

n number of processors in the "digital computer"
i processor number (i,…n)
ti processor cycle time (ti = 1/Fi)
Fi processor frequency
Ri peak floating point calculating rate
Wi architecture adjustment factor

Outline of "APP" calculation method

1. For each processor i, determine the peak number of 64-bit or larger floating point operations, FPOi, performed per cycle for each processor in the "digital computer". Note: In determining FPO, include only 64-bit or larger floating point additions or multiplications. All floating point operations must be expressed in operations per processor cycle; operations requiring multiple cycles may be expressed in fractional results per cycle. For processors not capable of performing calculations on floating point operands of 64-bit or more, the effective calculating rate R is zero.
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2. Calculate the floating point rate R for each processor Ri = FPOi/ti.
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3. Calculate "APP" as "APP" = W1 × R1 + W2 × R2 + … + Wn × Rn.
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4. For ‘vector processors’, Wi = 0,9. For non-‘vector processors’, Wi = 0,3. Note 1: For processors that perform compound operations in a cycle, such as addition and multiplication, each operation is counted. Note 2: For a pipelined processor the effective calculating rate R is the faster of the pipelined rate, once the pipeline is full, or the non-pipelined rate. Note 3: The calculating rate R of each contributing processor is to be calculated at its maximum value theoretically possible before the "APP" of the combination is derived. Simultaneous operations are assumed to exist when the computer manufacturer claims concurrent, parallel, or simultaneous operation or execution in a manual or brochure for the computer. Note 4: Do not include processors that are limited to input/output and peripheral functions (e.g., disk drive, communication and video display) when calculating "APP". Note 5: "APP" values are not to be calculated for processor combinations (inter)connected by "Local Area Networks", Wide Area Networks, I/O shared connections/devices, I/O controllers and any communication interconnection implemented by "software". Note 6: "APP" values must be calculated for processor combinations containing processors specially designed to enhance performance by aggregation, operating simultaneously and sharing memory; Technical Notes: 1. Aggregate all processors and accelerators operating simultaneously and located on the same die. 2. Processor combinations share memory when any processor is capable of accessing any memory location in the system through the hardware transmission of cache lines or memory words, without the involvement of any software mechanism, which may be achieved using "electronic assemblies" specified in 4A003.c. Note 7: A ‘vector processor’ is defined as a processor with built-in instructions that perform multiple calculations on floating-point vectors (one-dimensional arrays of 64-bit or larger numbers) simultaneously, having at least 2 vector functional units and at least 8 vector registers of at least 64 elements each.

PART VII

Category 5

CATEGORY 5 - TELECOMMUNICATIONS AND "INFORMATION SECURITY"

Part 1 - TELECOMMUNICATIONS

5A1 Systems, Equipment and Components

5A001 Telecommunications systems, equipment, components and accessories as follows:

Technical Note:

‘Channel switching time’ means the time (i.e., delay) to change from one receiving frequency to another, to arrive at or within ± 0,05 % of the final specified receiving frequency. Items having a specified frequency range of less than ± 0,05 % around their centre frequency are defined to be incapable of channel frequency switching.

Technical Notes:

- c. Optical fibres of more than 500 m in length and specified by the manufacturer as being capable of withstanding a ‘proof test’ tensile stress of 2 × 109 N/m2 or more;

Technical Note:

‘Proof Test’: on-line or off-line production screen testing that dynamically applies a prescribed tensile stress over a 0,5 to 3 m length of fibre at a running rate of 2 to 5 m/s while passing between capstans approximately 150 mm in diameter. The ambient temperature is a nominal 293 K (20 °C) and relative humidity 40 %. Equivalent national standards may be used for executing the proof test.

Technical Note:

For the purposes of 5A001.d. ‘electronically steerable phased array antenna’ is an antenna which forms a beam by means of phase coupling, (i.e., the beam direction is controlled by the complex excitation coefficients of the radiating elements) and the direction of that beam can be varied (both in transmission and reception) in azimuth or in elevation, or both, by application of an electrical signal.

- 1. "Instantaneous bandwidth" of 10 MHz or more; and

Technical Note:

Non-radar transmitters may include commercial radio, television or cellular telecommunications base stations.

- i. Not used;

5A101 Telemetry and telecontrol equipment, including ground equipment, designed or modified for ‘missiles’.

Technical Note:

In 5A101 ‘missile’ means complete rocket systems and unmanned aerial vehicle systems capable of a range exceeding 300 km.

5B1 Test, Inspection and Production Equipment

5B001 Telecommunications test, inspection and production equipment, components and accessories, as follows:

5C1 Materials

None

5D1 Software

5D001

"Software" as follows:

- 1. Execution of searches on the basis of "hard selectors" of either the content of communication or metadata acquired from a communications service provider using a ‘handover interface’; and

Technical Notes:

5D101

"Software" specially designed or modified for the "use" of equipment specified in 5A101.

5E1 Technology

5E001

"Technology" as follows:

- 2. Equipment employing a "laser" and having any of the following:

Technical Note:

For the purposes of 5E001.d., the parameter peak saturated power output may also be referred to on product data sheets as output power, saturated power output, maximum power output, peak power output, or peak envelope power output.

5E101

"Technology" according to the General Technology Note for the "development", "production" or "use" of equipment specified in 5A101.

Part 2 - "INFORMATION SECURITY"

5A002, 5D002.a.1., 5D002.b. and 5D002.c.1. do not control items as follows:

Technical Note:

For the purpose of the Cryptography Note, ‘executable software’ means "software" in executable form, from an existing hardware component excluded from 5A002 by the Cryptography Note.

Note to the Cryptography Note:

5A2 Systems, Equipment and Components

5A002

"Information security" systems, equipment and components, as follows:

Technical Notes:

Technical Note:

An algorithm described by Technical Note 2.c. may be referred to as being post-quantum, quantum-safe or quantum-resistant.

- b. Having all of the following:

Technical Note:

‘Personal data’ includes any data specific to a particular person or entity, such as the amount of money stored and data necessary for "authentication".

- 2. ‘Readers/writers’ specially designed or modified, and limited, for items specified in paragraph a.1. of this Note.

Technical Note:

‘Readers/writers’ include equipment that communicates with smart cards or electronically readable documents through a network.

Technical Note:

‘Money transactions’ in 5A002.a. Note 2.b. includes the collection and settlement of fares or credit functions.

- j. Items specially designed for a ‘connected civil industry application’, meeting all of the following:

- 1. Being specially designed to communicate with the devices specified in paragraph j.1.a. above; and

- 2. The "information security" functionality is limited to supporting the ‘connected civil industry application’ of devices specified in paragraph j.1.a. above, or the tasks of "OAM" of this networking equipment or of other items specified in paragraph j. of this Note; and

- 2. Where the "information security" functionality implements only published or commercial cryptographic standards, and the cryptographic functionality cannot easily be changed by the user.

Technical Notes:

Technical Note:

A ‘cryptographic activation token’ is an item designed or modified for any of the following:

Technical Note:

"Quantum cryptography" is also known as Quantum Key Distribution (QKD).

5A003 Systems, equipment and components, for non-cryptographic "information security", as follows:

5A004 Systems, equipment and components for defeating, weakening or bypassing "information security", as follows:

Technical Note:

‘Cryptanalytic functions’ are functions designed to defeat cryptographic mechanisms in order to derive confidential variables or sensitive data, including clear text, passwords or cryptographic keys.

Technical Note:

‘Extract raw data’ from a computing or communications device means to retrieve binary data from a storage medium (e.g., RAM, flash or hard disk) of the device without interpretation by the device’s operating system or filesystem.

5B2 Test, Inspection and Production Equipment

5B002

"Information security" test, inspection and "production" equipment, as follows:

5C2 Materials

None.

5D2 Software

5D002

"Software" as follows:

5E2 Technology

5E002

"Technology" as follows:

PART VIII

Category 6

CATEGORY 6 - SENSORS AND LASERS

6A Systems, Equipment and Components

6A001 Acoustic systems, equipment and components, as follows:

Technical Notes:

Technical Note:

The acoustic sensor pressure rating determines the depth rating of the equipment specified in 6A001.a.1.a.2.

Technical Note:

‘Sounding rate’ is the product of the maximum speed (m/s) at which the sensor can operate and the maximum number of soundings per swath assuming 100 % coverage. For systems that produce soundings in two directions (3D sonars), the maximum of the ‘sounding rate’ in either direction should be used.

Technical Notes:

Technical Note:

The ‘free-field Source Level ( SLRMS)’ is defined along the maximum response axis and in the far field of the acoustic projector. It can be obtained from the Transmitting Voltage Response using the following equation: SLRMS = (TVR + 20log VRMS) dB (ref 1μPa at 1 m), where SLRMS is the source level, TVR is the Transmitting Voltage Response and VRMS is the Driving Voltage of the Projector.

Technical Notes:

Technical Notes:

Technical Note:

Hydrophone arrays consist of a number of hydrophones providing multiple acoustic output channels.

Technical note:

‘Able to be modified’ in 6A001.a.2.b.1. and 2. means having provisions to allow a change of the wiring or interconnections to alter hydrophone group spacing or operating depth limits. These provisions are: spare wiring exceeding 10 % of the number of wires, hydrophone group spacing adjustment blocks or internal depth limiting devices that are adjustable or that control more than one hydrophone group.

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